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As the proposals are being discussed, there is interest in evaluating the instructions also work being done to add support for the instructions to compilers, as well as evaluation through the path of implementations (whether its GEM5, FPGA, RTL or something else). In order to align the two sides - requirements providers / user and the implementors, let’s summarise the instructions, their behaviour and potential encodings.
Proposal Summary
Instructions | Description | Encodings | Notes | |||
|---|---|---|---|---|---|---|
vzipeven | Satisfies the requirement for trn1/trn2https://lists.riseproject.dev/g/RISE-System-Libraries-WG/message/163 | |||||
vzipodd | ||||||
vzip2a | ||||||
vzip2b | ||||||
vunzip2a | ||||||
vunzip2b | ||||||
vabdu.[vv | vabdu.vx | vabdu.vi | vdot, vx, vi] | RISCV64 new vector instructions requirements for video / multimedia | ||
vqdotu.[vv, vx] | Vector 8-bit Unsigned Dot Product | https://lists.riscv.org/g/sig-vector/message/116 Are the other variants (signed, etc.) useful? | ||||