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  1. There is an arithmetic right shift followed by a masking operation in quant_4x4 that can be simplified into a logical right shift eliminating a small amount of code on a critical path.
  2. Vector setup and element extraction is likely sub-optimal in the SAD/SATD routines. 
  3. Removal of VIEW_CONVERT_EXPR nodes is likely important
  4. And optimization of BITFIELD_INSERT_EXPRSATD routine, particularly for zvl512b
    1. Much of this can be fixed by adjusting how we expand the vector setup code
    2. Robin owns this
  5. Rearrangement of SLP nodes with multiple occurrences in the in the same statement to avoid duplicates with a vec_perm to restore the original ordering may have as much as a 10% benefit for vectorized x264.
    1. Additional information from GCC's bug database
    2. Proposed patch, probably won't go in as-is, but can be used for experimentation
  6. GCC does not make good use of widening vector ops that overlap source/destination registers.  Expectation is this is another 1-2% improvement
  7. GCC does not hoist vxrm assignments aggressively, which can significantly impact performance if the uarch does not provide fast vxrm access.   This is about 2% on the BPI

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