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  1. Basic ZICondops patterns in the RISC-V target description
    1. VRULL + Ventana
  2. Improvements to generate those patterns early in the RTL optimizer pipeline
    1. Ventana (primarily Raphael's work with bugfixing from Jeff)
  3. Improvements to the if-converter to consistently utilize the conditional zero primitive provided by ZICondops
    1. Mixed work from VRULL and Ventana


Evaluation of the initial implementation has indicated that idioms to implement 32 bit operations on rv64 are consistently not if-converted.  Improvements to capture those cases are in progress.

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Page Properties


Development

Status
colourBlue
titleONGOING


Development TimelineNA
Upstreaming

Status
colourBlue
titleONGOING


Upstream Version





Contacts

Philip Tomsich (VRULL)

Raphael Zinsly (Ventana)

Jeff Law (Ventana)


Dependencies

QEMU Zicond




Updates

 

  • Manolis from VRULL has started posting some of the generic work to facilitate use of Zicond/Xventanacondops
  • Jeff from Ventana continues to fix bugs in code which exposes Zicond/Xventanacondops to tree→RTL expansion code  (internal to Ventana right now, but definitely planned to upstream)

 

  • Binutils dependency has been resolved (Zicondops will appear in binutils-2.41 in July)
  • VRULL will repost their work.  Ventana will coordinate with VRULL on review/updates
  • Note QEMU dependency
  • Consistent reporting of stakeholders/partners

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