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This work consists of 4 subprojects:

  1. Basic ZICondops patterns in the RISC-V target description
    1. VRULL + Ventana + ESWIN
  2. Improvements to generate those patterns early in the RTL optimizer pipeline
    1. Ventana (primarily Raphael's work with bugfixing from Jeff) + ESWIN
  3. Fixes to cost model to enable more conditional move generatinon
  4. Improvements to the if-converter to consistently utilize the conditional zero primitive provided by ZICondops
    1. Mixed work from VRULL, Ventana & ESWIN

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Page Properties


Development

Status
colourGreen
titleCOMPLETED


Development Timeline2H2023
Upstreaming

Status
colourBlue
titleIN PROGRESS

(4 variants to reconcile)


Upstream Version

gcc-14 (Spring 2024)

gcc-13 RISC-V Coordination branch




Contacts

Philip Tomsich (VRULL)

Raphael Zinsly (Ventana)

Jeff Law (Ventana)


DependenciesNone



Updates

 

  • One codegen fix and once ICE fix upstreamed
  • Addition of xventanacondops on top of zicond

 

  • Found and fixed missed case affecting CRC loop in coremark
  • Still untangling generic changes.  3 significant implementations in play
  • Cost model fixes still pending – critically important as we can't add the full suite of tests until that's fixed, hoping to wrap it up this week

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