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Table of Contents

About

The IOPMP is a hardware checker located in a bus fabric. It has the ability to check each transaction passing through it on the fly. It is an essential component used to create isolation spaces for trusted execution environments by controlling transactions initiated, especially by I/O agents. This project will help programmers of secure systems using the QEMU emulation as an alternative before their hardware supports IOPMP.
The IOPMP spec v1v0.09.0-draft21: https://github.com/riscv-non-isa/iopmp-spec/blobreleases/main/riscv_iopmp_specification.pdftag/v0.9.1

Project Scope and Timelines

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Addition to hw/misc/riscv_iopmp.c around:

  • IOPMP device which checks the permission of memory acces with requestor-role-ID (RRID).

Change to hw/riscv/virt.c around:

  • Addition of "iopmp" machine option.
  • When "iopmp" option is enabled:
    • Addition IOPMP device
    • The devices on the generic PCIe host bridge connect to the IOPMP device

Components and Repos

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Current verison(v8) patch
[v8] Support RISC-V IOPMP | Patchew

Stakeholders and Partners

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Other QEMU for RISC-V contributors, including:

  • RISE
    • Daniel Henrique Barboza
  • External
    • Alistair Francis (QEMU for RISC-V maintainer)

Dependencies

None

Measure of Success

TBD

RISE Requirements

None

Status

Page Properties


Development

Status
colourRedGreen
titleTBDCOMPLETED


Development Timeline

4Q2023


Dependencies

None


Upstreaming

Status
colourRedYellow
titleTBDinprogress


Upstream Version

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Contacts



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