...
It is expected that a typical set of supported fusions can reduce the operation count within the processor's execution units by 1-2%3%.
Stakeholders/Partners
RISE:
Ventana: 1 FTE (duration unknownVRULL Contract). Contractor to do the initial implementation in a generic wayInitial implementation (Philipp Tomsich)
Ventana: 1 FTE (2 weeks)~2 weeks. Raphael Zinsly: Improve implementation to cover missed cases
Ventana: 1 FTE (2 weeks)~2 weeks. Jivan Hakobyan: Improve tooling to analyze instruction trace data for missed cases
...
| Page Properties | ||||||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
Updates
- Infrastructure for fusion upstreamed to GCC. Currently supports 10 fusion cases supported by Veyron V1
- Other ports can re-use those cases trivially and the framework is generic enough to add additional cases over time
- Development of store-store fusion support is effectively complete
- Some data on how to evaluate store-pair fusion available, but it's very noisy
- Perhaps just focus on squashing out the obvious cases from the instruction stream data and call it done
- Working through implementation details on store-store case
- Thinking is to start upstreaming once store-store case is handled reasonably well
- Raphael has prototype to implement missing fusion case
- Under evaluation using tools from Jivan (dynamic instruction stream)
- Unclear how large end benefit will be, not sure if we have good insights from our emulator to tell us when this happens
- WIP to implement missing "fusion" case for Veyron V1 from Raphael
- Note Stakeholders/Partners in a consistent way
...