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Topic ID | Topic Name | Priority | Development | Upstreaming | Dependency | Tentative ETA | Company | Contact | Comments |
Valgrind (00) | |||||||||
DP_00_001 | Valgrind vector support | High | InProgress | InProgress | Q4 2023 | Intel | fei2.wu@intel.com | 1. RV on Valgrind w/o Vector: https://github.com/petrpavlu/valgrind-riscv64 2. this task to support RVV framework + selected instructions on valgrind | |
DP_00_002 | Valgrind(mainly focus on the vector instruction support) | Medium | InProgress | Unknown | ? | T-Head | yunhai.syh@alibaba-inc.com | ||
DP_00_003 | Valgrind | Low | Unknown | Unknown | Q3 2023 | Ventana | jlaw@ventanamicro.com | Basic rv64 functionality to run Linux binaries correctly. Then support for the extensions in RVA22/RVA23. | |
DP_00_004 | Valgrind bitmanip, V, Zvk, etc. support | Medium | Unknown | Unknown | 2024 | SiFive | |||
GDB (01) | |||||||||
DP_01_001 | GDB | Low | Unknown | Unknown | Q4 2023 Q1 2024 | VentanaBOSC | jlaw@ventanamicrozhangjian@bosc.ac.comcn | Hardware Watchpoints,Inferior function calls | |
DP_01_002 | Evaluate GDB status on RISC-V | Medium | Unknown | Unknown | Andes | hellosun@andestech.com | https://wiki.riseproject.dev/pages/viewpage.action?pageId=395196 | ||
DP_01_003 | Add Zc support to GDB Simulator | Medium | InProgress | NotStarted | Q3 2023 | Imagination | simon.harvey@imgtec.com | https://wiki.riseproject.dev/display/HOME/DP_01_003+-+GDB+Simulator+-+Add+Zc+support | |
LLDB (02) | |||||||||
DP_02_001 | LLDB for RV64 | Low | Unknown | Unknown | SiFive | https://reviews.llvm.org/D62732 | https://reviews.llvm.org/D62732 | ||
DP_02_002 | Evaluate LLDB status on RISC-V | Medium | Unknown | Unknown | Andes | hellosun@andestech.com | https://wiki.riseproject.dev/pages/viewpage.action?pageId=395196 | ||
gprofng (03) | |||||||||
DP_03_001 | gprof-ng | Low | Unknown | Unknown | Q4 2023 | Ventana | jlaw@ventanamicro.com | Basic support for RV, particularly as it moves into the datacenter. Probably not that important on the embedded side. | |
Perf (04) | |||||||||
DP_04_001 | Userspace Cycle/Instret access | High | Completed | InProgress | Q3 2023 | Rivos | Alexandre Ghiti <alexghiti@rivosinc.com> | ||
DP_04_002 | Perf event discovery/encoding from json file | Medium | Unknown | Unknown | Q4 2023 | Rivos | atishp@rivosinc.com | ||
DP_04_003 | Perf CTR (equivalent of x86 LBR) support | Medium | Unknown | Unknown | Q1 2024 | Rivos, SiFive | |||
DP_04_004 | Perf CTR call stack mode support | Medium | Unknown | Unknown | Q1 2024 | Rivos, SiFive | |||
ASan (05) | |||||||||
DP_05_001 | Address sanitizer | High | Completed | InProgress | 2024 | T-Head | yunhai.syh@alibaba-inc.com | support RV32I in LLVM and GCC, research on optimization cooperate with Memory tagging extension | |
ToolChain (06) | |||||||||
DP_06_001 | riscv-gnu-toolchain | Unknown | Unknown | Unknown | SiFive | kito.cheng@sifive.com | |||
DP_06_002 | binutils | Unknown | Unknown | Unknown | SiFive | kito.cheng@sifive.com | |||
DP_06_003 | ILP32 PSABI | Medium | InProgress | Unknown | 2024 | SiFive | kito.cheng@sifive.com | PLCT guys has init implmenation, but need more survey for other ilp32 ABI like x32, ilp32/aarch64 and MIPS n32 | |
DP_06_004 | DWARF representation for RVV | Unknown | Unknown | Unknown | Red Hat | ||||
DynamoRIO (07) | |||||||||
DP_07_001 | DynamoRIO | Medium | InProgress | Completed | 2024 | Rivos | adlr@rivosinc.com | We kicked off the inital work and posted it upstream, but haven't been able to continue it | |
OpenLink (08) | |||||||||
DP_08_001 | openLink unifed debug probe protocol and firmware | Medium | Completed | NotStarted | 2024 | T-Head | yunhai.syh@alibaba-inc.com | ||
eBPF (09) | |||||||||
DP_09_001 | Evaluate status on RV: bpftrace | Unknown | Unknown | Unknown | Look for someone to take | ||||
DP_09_002 | Evaluate status on RV: bcc | Unknown | Unknown | Unknown | |||||
DP_09_003 | Evaluate status on RV: cilium | Unknown | Unknown | Unknown | |||||
DP_09_004 | Evaluate status on RV: bpftune | Unknown | Unknown | Unknown | |||||
Performance Benchmarking and Analysis (10) | |||||||||
DP_10_001 | LKP framework enablement on RISC-V | High | InProgress | InProgress | 2H2023 | Intel | fei2.wu@intel.com | https://github.com/intel/lkp-tests.git | |
DP_10_002 | LKP workload enablement on RISCV-V | Medium | InProgress | InProgress | 2024 | Intel | fei2.wu@intel.com | ||
Simpleperf | |||||||||
DP_11_001 | Simpleperf (primarily used on Android) | High | Unknown | NotStarted | 1H2024 | SiFive | kevin.mills@sifive.com | ||
OpenOCD | |||||||||
DP_12_001 | Evaluate OpenOCD status on RISC-V | Unknown | Unknown | Unknown | Andes | hellosun@andestech.com | https://wiki.riseproject.dev/pages/viewpage.action?pageId=395196 |
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