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  • Tested on VisionFive2 boards w/ "Headless" IoT profile. Expanding coverage to "Headed" IoT profile.
  • It will require .NET support to cover general "Consumer Electronics"
  • Samsung will test w/ an actual RISC-V based CE SoC and actual product next year, which will be a test basis for a few RISC-V extensions, too.
  • Many are imported from openSUSE's effort for RISC-V.



The following is the gerrit search results in "review.tizen.org" with "RISC-V" keyword.


Search for RISC-V





SubjectStatusOwnerProjectBranchUpdatedSizeCRV
Add tizen-boot-riscv64-vf2

Lukasz Stelmach

profile/common/metatizen (RISC-V)8:23 PM
+1

Add tizen-boot-riscv64-qemu

Lukasz Stelmach

profile/common/metatizen (RISC-V)6:54 PM
+1

Add platform-preset-boards-visionfive2-hal-backend.inc

Lukasz Stelmach

tools/building-blockstizen (RISC-V)Jun 19



Fix the wrong requires section of pkgconfig fileAbandoned

Sangjung Woo

platform/core/api/machine-learningtizenJun 13
-1

Tizen-Base-Dev: add riscv64

Dongkyun Son

scm/meta/qbmaster (RISC-V)Jun 12



iptunnel: fix building w/older linux headersMerged

Marek Pikuła

platform/upstream/net-toolstizen_base (RISC-V)Jun 12

Update autotools files on riscv64

Lukasz Stelmach

platform/upstream/rpmtizen_base (RISC-V)Jun 8
+1

fix zstd magic

Lukasz Stelmach

platform/upstream/rpmtizen_base (RISC-V)Jun 8
+1

riscv64: Add VisionFive2 spec with boot script

Marek Pikuła

platform/kernel/u-boottizen (RISC-V)Jun 7


riscv64: update config.subMerged

Lukasz Stelmach

platform/upstream/libelf0tizen_base (RISC-V)Jun 7

riscv64: update config.subMerged

Lukasz Stelmach

platform/upstream/alsa-utilstizen_base (RISC-V)Jun 7

riscv64: update config.subMerged

Lukasz Stelmach

platform/upstream/alsa-libtizen_base (RISC-V)Jun 7

packaging: add riscv64

Dongkyun Son

platform/upstream/qemu-acceldevelop (RISC-V)Jun 7
+1

util/ulockmgr_server.c: conditionally define closefrom (fix glibc-2.34+)Merged

Lukasz Stelmach

platform/upstream/fusetizen (RISC-V)Jun 6

RISC-V: Libitm add RISC-V support.

Dongkyun Son

platform/upstream/gcctizen_baseJun 5



riscv64: update config.subMerged

Lukasz Stelmach

platform/upstream/libeventtizen_base (RISC-V)Jun 2

riscv64: update config.subMerged

Lukasz Stelmach

platform/upstream/xmlstarlettizen_base (RISC-V)Jun 2

packaging: build for riscv64Merged

Lukasz Stelmach

platform/upstream/python3-MarkupSafetizen_base (RISC-V)Jun 2

riscv64: update config.subMerged

Lukasz Stelmach

platform/upstream/libvorbistizen_base (RISC-V)Jun 2

riscv64: update config.subMerged

Lukasz Stelmach

platform/upstream/liboggtizen_base (RISC-V)Jun 2

packaging: build for riscv64Merged

Lukasz Stelmach

platform/upstream/python-MarkupSafetizen_base (RISC-V)Jun 2

riscv64: update config.subMerged

Lukasz Stelmach

platform/upstream/chrpathtizen_base (RISC-V)Jun 2

riscv64: Update config.sub and config.guessMerged

Marek Pikuła

platform/upstream/yasmtizen_base (RISC-V)Jun 2

Build for QEMU and VisionFive2 RISC-V platformsMerged

Lukasz Stelmach

platform/kernel/linux-tizen-modulestizenMay 29

Add awk as dependency

Marek Pikuła

platform/core/security/privilege-checkertizen (RISC-V)May 16
+1

Link with libatomicMerged

Marek Pikuła

platform/core/system/buxton2tizen (RISC-V)May 16

tests: Add -mno-relax to link flags for server testMerged

Lukasz Stelmach

platform/core/appfw/app2sdtizen (RISC-V)May 16

tests: provide getuid() mockupMerged

Lukasz Stelmach

platform/core/appfw/app2sdtizen (RISC-V)May 16

riscv: Kconfig: Enable cpufreq kconfig menuMerged

Hoegeun Kwon

platform/kernel/linux-starfivetizenMay 12

RISC-V: Implement __builtin_thread_pointerMerged

Lukasz Stelmach

platform/upstream/gcctizen_baseMay 11

libsanitizer: cherry-pick 9cf13067cb5088626ba7 from upstreamMerged

Lukasz Stelmach

platform/upstream/gcctizen_base (RISC-V)May 11

packaging: build for riscv64Merged

Lukasz Stelmach

platform/upstream/gcctizen_base (RISC-V)May 11

packaging: provide updated config.sub with riscv64 supportMerged

Lukasz Stelmach

platform/upstream/gcctizen_base (RISC-V)May 11

Remove unsupported sort -V flag

Lukasz Stelmach

platform/upstream/libbpftizen (RISC-V)May 9
+1

packaging: Update to 1.0.1

Lukasz Stelmach

platform/upstream/libbpftizen (RISC-V)May 9
+1

Merge tag 'upstream/1.1.0' into tizenAbandoned

Marek Pikuła

platform/upstream/libbpftizen (RISC-V)May 9


Update packaging for v1.1.0Abandoned

Marek Pikuła

platform/upstream/libbpftizen (RISC-V)May 9


riscv64: Add support for RISC-VAbandoned

Marek Pikuła

platform/upstream/libbpftizen (RISC-V)May 9


Imported Upstream version 1.1.0Abandoned

Marek Pikuła

platform/upstream/libbpfupstream (RISC-V)May 9

pristine-tar data for libbpf-1.1.0.tar.gzAbandoned

Marek Pikuła

platform/upstream/libbpfpristine-tar (RISC-V)May 9

packaging: Add RISC-V compilation flag

Lukasz Stelmach

platform/upstream/libbpftizen (RISC-V)May 9
+1

Handle config.guess and config.sub with DOS EOLs

Lukasz Stelmach

platform/upstream/rpmtizen_base (RISC-V)May 9
+1

riscv64: Update config.sub and config.guessAbandoned

Marek Pikuła

platform/upstream/gmimetizen (RISC-V)May 9
-1

riscv64: Update config.sub and config.guessAbandoned

Marek Pikuła

platform/upstream/hyphentizen (RISC-V)May 9
-1

Update config.sub and config.guessAbandoned

Marek Pikuła

platform/upstream/libcap-ngtizen (RISC-V)May 9
-1

halapi: Add support of RISC-V architecture typeMerged

Chanwoo Choi

platform/hal/api/commontizenMay 8

riscv64: update config.subAbandoned

Lukasz Stelmach

platform/upstream/icecreamtizen_base (RISC-V)May 5


riscv: Update config.guess and config.subAbandoned

Marek Pikuła

platform/upstream/device-mappertizen (RISC-V)May 5


iptunnel: drop netinet/ip.h includeAbandoned

Lukasz Stelmach

platform/upstream/net-toolstizen_base (RISC-V)May 5
+1

iptunnel: fix building w/older linux headersAbandoned

Lukasz Stelmach

platform/upstream/net-toolstizen_base (RISC-V)May 5
+1

riscv64: update config.subAbandoned

Lukasz Stelmach

platform/upstream/libnl3tizen_base (RISC-V)May 5


riscv64: update config.subAbandoned

Lukasz Stelmach

platform/upstream/libnl2tizen_base (RISC-V)May 5


riscv64: Update config.sub and config.guessAbandoned

Marek Pikuła

platform/upstream/sbctizen (RISC-V)May 5

riscv64: Update config.sub and config.guessAbandoned

Marek Pikuła

platform/upstream/libmnltizen (RISC-V)May 5

Remove config.sub and config.guessAbandoned

Marek Pikuła

platform/upstream/cryptsetuptizen (RISC-V)May 4

Drop -lutil to build against glibc 2.35Abandoned

Lukasz Stelmach

platform/upstream/pamtizen_base (RISC-V)May 4
-1

RISC-V: dts: jh7110: Change from bootph-pre-ram to u-boot,dm-splMerged

Jaehoon Chung

platform/kernel/u-boottizenMay 4

RISC-V: fix riscv64 extension isa problemMerged

Jaehoon Chung

platform/kernel/u-boottizenMay 4

Update to version 2.9.9Merged

Lukasz Stelmach

platform/upstream/fusetizen (RISC-V)Apr 28

libarchive: Do not include sys/mount.h when linux/fs.h is presentAbandoned

Lukasz Stelmach

platform/upstream/libarchivetizen_base (RISC-V)Apr 28

Include <sys/mount.h> in decl_headersMerged

Lukasz Stelmach

platform/upstream/systemdtizen (RISC-V)Apr 28

Drop bundled copy of linux/if_arp.hMerged

Lukasz Stelmach

platform/upstream/systemdtizen (RISC-V)Apr 28

llvm/cmake/config.guess: add support for riscv32 and riscv64Abandoned

Lukasz Stelmach

platform/upstream/llvmtizen_base (RISC-V)Apr 28
+1

[sanitizer] Remove #include <linux/fs.h> to resolve fsconfig_command/mount_at...Abandoned

Lukasz Stelmach

platform/upstream/llvmtizen_base (RISC-V)Apr 28
+1

[clang-tools-extra] fix the check for if '-latomic' is necessaryAbandoned

Lukasz Stelmach

platform/upstream/llvmtizen_base (RISC-V)Apr 28
+1

[CMake] CheckAtomic.cmake: catch false positives in RISC-VAbandoned

Lukasz Stelmach

platform/upstream/llvmtizen_base (RISC-V)Apr 28
+1

riscv64: update config.subAbandoned

Lukasz Stelmach

platform/upstream/iptablestizen_base (RISC-V)Apr 28
+1

riscv64: update m4 files from autoconf-archiveAbandoned

Lukasz Stelmach

platform/upstream/nghttp2tizen_base (RISC-V)Apr 28
+1

Link libclang_rt.asan.so against libatomic when necessaryMerged

Lukasz Stelmach

platform/upstream/llvmtizen_baseApr 27

packaing: add qemu-riscv64 and register it to binfmt_misc

Dongkyun Son

platform/upstream/qemumaster (RISC-V)Apr 27


riscv: dts: jh7110: Add initial u-boot device treeMerged

Jaehoon Chung

platform/kernel/u-boottizenApr 26

riscv: dts: jh7110: Add initial StarFive JH7110 device treeMerged

Jaehoon Chung

platform/kernel/u-boottizenApr 26

riscv: cpu: jh7110: Add support for jh7110 SoCMerged

Jaehoon Chung

platform/kernel/u-boottizenApr 26

[packaging] build llvm for riscv64Merged

Lukasz Stelmach

platform/upstream/llvmtizen_base (RISC-V)Apr 26

packaging: rewrite install_all.sh

Lukasz Stelmach

platform/upstream/linux-glibc-develtizen_base (RISC-V)Apr 25


Handle config.guess and config.sub with DOS EOLsAbandoned

Lukasz Stelmach

platform/upstream/rpmtizen (RISC-V)Apr 21


libdw: dwarf_frame_register takes an array of at least 3 Dwarf_OpsAbandoned

Lukasz Stelmach

platform/upstream/elfutilstizen_base (RISC-V)Apr 21


libebl: Remove unused ebl_syscall_abi.Abandoned

Lukasz Stelmach

platform/upstream/elfutilstizen_base (RISC-V)Apr 21
+1

Build for riscv64

Lukasz Stelmach

platform/upstream/linux-glibc-develtizen_base (RISC-V)Apr 20


Upgrade to 5.15.108 headers

Lukasz Stelmach

platform/upstream/linux-glibc-develtizen_base (RISC-V)Apr 20


Build for riscv64Abandoned

Lukasz Stelmach

platform/upstream/linux-glibc-develtizen (RISC-V)Apr 20
+1

Upgrade to 5.15.99 headersAbandoned

Lukasz Stelmach

platform/upstream/linux-glibc-develtizen (RISC-V)Apr 20
+1

packaging: rewrite install_all.shAbandoned

Lukasz Stelmach

platform/upstream/linux-glibc-develtizen (RISC-V)Apr 20
+1

riscv64: Add basic support for riscv64 IoT headlessMerged

Marek Pikuła

tools/building-blockstizen (RISC-V)Apr 17

Add RISC-V test utilsMerged

Lukasz Stelmach

platform/core/security/security-configtizen (RISC-V)Apr 17

riscv64: Build as ARCH64Merged

Marek Pikuła

platform/core/connectivity/bluetooth-frwktizen (RISC-V)Apr 14

riscv64: Add as supported architectureMerged

Marek Pikuła

platform/core/system/setup-adaptortizen (RISC-V)Apr 14

Add prebuilt lws library for riscv64Merged

Lukasz Stelmach

platform/core/api/vinetizen (RISC-V)Apr 14

riscv: Add riscv64 as 64-bit archMerged

Lukasz Stelmach

platform/upstream/freetype2tizen (RISC-V)Apr 14

riscv64: Disable static lws for riscv64 buildAbandoned

Marek Pikuła

platform/core/api/vinetizen (RISC-V)Apr 13
+1

pristine-tar data for fuse-2.9.9.tar.gzAbandoned

Marek Pikuła

platform/upstream/fusepristine-tar (RISC-V)Apr 13


riscv: dts: jh7110: Add initial u-boot device treeAbandoned

Jaehoon Chung

platform/kernel/u-boottizenApr 10


riscv: dts: jh7110: Add initial StarFive JH7110 device treeAbandoned

Jaehoon Chung

platform/kernel/u-boottizenApr 10


riscv: cpu: jh7110: Add support for jh7110 SoCAbandoned

Jaehoon Chung

platform/kernel/u-boottizenApr 10


Merge tag 'upstream/2.9.9' into tizenAbandoned

Marek Pikuła

platform/upstream/fusetizen (RISC-V)Apr 6

util/ulockmgr_server.c: conditionally define closefrom (fix glibc-2.34+)Abandoned

Marek Pikuła

platform/upstream/fusetizen (RISC-V)Apr 6

Update spec to 2.9.9Abandoned

Marek Pikuła

platform/upstream/fusetizen (RISC-V)Apr 6

riscv64: Add configuration for riscv64

Marek Pikuła

platform/upstream/mesatizen (RISC-V)Apr 4


config: Enable FTRACEMerged

Marek Pikuła

platform/kernel/linux-starfivetizen (RISC-V)Apr 3

packaging: Add version to modules directoryMerged

Marek Pikuła

platform/kernel/linux-starfivetizen (RISC-V)Apr 3

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