Skip to end of metadata
Go to start of metadata

You are viewing an old version of this page. View the current version.

Compare with Current View Page History

« Previous Version 26 Next »


No.Doc / Feature / Task / Bug DescritptionDeliverable

Prioriy (Low - Middle - High)

Estimation of Due DateOwnerStatausOther Comments
#1Design document 

Design document describe how StandaloneMM for Risc-V working such as how

  • HOB retrieving when StandaloneMM run.
  • Communication between StandloneMM and EDK2
  • How StandaloneMM start from entry point
  • Protection in theory that StandaloneMM runs under M-mode provided also Salus (this is easy as APTEE already explain in the its specs).

High Level Design Document

High

07/15/23



Tuan - Ventana



#2Staging RepoCreate staging branch everyone can contribute toCode RepoHigh06/30/23Yong - Intel

Branch created

https://github.com/tianocore/edk2-staging/tree/RiscV64StandaloneMm

Need push baseline code to the branch, can then team can start with
#3Unify MM payload for ARM and RISC-V
The MM payload is based on ARM TF. To support for RISCV, the structure needs to be more standard to support both Arm and RiscV. I am seeing the mixing code for RISC-V that exists in “ARM’ source code such as: StandaloneMmCoreEntryPoint/Arm/CreateHobList.c, StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/Arm/SetPermissions.cCodeHigh

07/20/23


Tuan - Ventana
Seek help from Jeff Brasen from Nivida ?
#4Unify MM entrypoint API for ARM and RISC-V

PI_MM_ARM_TF_CPU_DRIVER_ENTRYPOINT needs to be renamed to common name for ARM and RISC-V.

Code

High

07/20/23


Tuan - Ventana
Seek help from Jeff Brasen from Nivida ?
#5Create SBI Ext interface for MM and UEFI


Spec

High
07/25/23Tuan - Ventana
SBI calling from Standalone MM should using payload data from standard SBI Ext of APTEE or  Penglai
#6Move SBI call to RISC-V MM library

SBI calling should be in the MM library. Keep RiscVSbiLib as base SBI library.

Code

High07/31/23Yong - IntelDeferDefer for SBI spec, do we need a dedicated SBI call for MM ?
#7Hob re-structure 

Hob structure needs to be common.

Sources.AARCH64, Sources.ARM, Sources.RISCV64]

 Arm/StandaloneMmCoreHobLib.c   Arm/StandaloneMmCoreHobLibInternal.c

Code

High07/31/23Yong - IntelDonehttps://github.com/tianocore/edk2-staging/blob/RiscV64StandaloneMm/StandaloneMmPkg/Library/StandaloneMmCoreHobLib/StandaloneMmCoreHobLib.inf
#8MM entrypoint with HOB address

HOB can be added to A1 of StandaloneMM entry point

Code

High07/31/23Yong - Intel

Done


  • Use a0 for hartid
  • Use a1 for bootInfo and the hoblist is created based on this bootInfo

https://github.com/tianocore/edk2-staging/tree/RiscV64StandaloneMm/StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/RiscV64

#9Qemu to support Secure UARTQemu to support Secure UARTCodeHigh
Yong - IntelIn-Progress

Patch to be upstream

https://lore.kernel.org/all/20230425073509.3618388-1-yong.li@intel.com/

#10Qemu to support flash1 storage variableQemu to support flash1 storage variableCodeHigh07/31/23Yong - IntelDoneRebased with the latest EDK2 repo. flash1 has been used for storage variable
#11StandaloneMm as a Secure Payload of M-Mode FW
Need build the sign and authentication flowPoCMiddle
TBD

#11Evaluate StandaloneMmPkg in M-Mode FWStandaloneMmPkg  as M-Mode FW, payload of OpenSBIPoCHigh

InvalidIn current implementation, the MM firmware is in (H)S mode for both OpenSBI or COVE implementation
#12Evaluate StandaloneMmPkg sPMP based TEE FW (eg: Penglai TEE)StandaloneMmPkg  as TEE payloadPoCMiddle
TBDIn-ProgressEDK2_00_03 Evaluate with OpenSBI
#13Evaluate StandaloneMmPkg in TVM (eg: Salus/AP-TEE)

Currently the CoVE dose not fit the model that StandaloneMM requires access to the I/O directly through TVM. There could be potential AP-TEE / TEEIO spec change or definition.

PoCMiddle

Dhaval Samuel - Rivos

Tuan - Ventana

In-Progress

EDK2_00_04 Evaluate with Salus

Potential AP-TEE / TEEIO spec change or definition, definitly need help from Rivos for this task together

#14

Evaluate StandaloneMmPkg

in dedicated HW core(eg: T-Head TH1520)

TH1520 has a dedicate Cortex M3 Core for TEE, evaluate to isolate the flash storage to the TEE core and also run the StandaloneMmPkg on the TEE core and use Mbox to communicate between TEE core and RISC-V AP core.

PoC

Middle
TBD
May need involve T-Head
#15

Prototype StandaloneMmPkg and Secure Storage service in VisionFiveV2

The flash storage service has been enabled in EDK2 by StarFive. Penglai is also porting their sPMP based TEE solution on VisionFIveV2, probably can combine all these things together with StandaloneMmPkg and prototype a demo

PoC

Middle
TBD
Depends on flash storage isolation on VisionFiveV2,  an also the Penglai TEE enablement on VF2.  Furthermore both Penglai and StarFive are not RISE member.
#16

Prototype StandaloneMmPkg with SiFive WorldGuard


PoC

Middle
TBD

  • No labels