About

The Vector emulation in QEMU does not perform well when comparing with the scalar (non-Vector) equivalent. With a regular binary we can see a difference of 5* slowdown in a single binary in comparison with a non-vector version \[1\]. When under heavy workloads like SPEC the discrepancy tends to be even greater.

This slowdown impacts development of applications that uses RVV. It would be desirable that, at very least, the Vector emulation in QEMU performs the same as the scalar version.

References:

[1] - https://lore.kernel.org/qemu-riscv/0e54c6c1-2903-7942-eff2-2b8c5e21187e@ventanamicro.com/

Project Scope and Timelines

The project will take place during 2024, probably by a contractor.

Components and Repos

Upstream Qemu.

Stakeholders and Partners

Other QEMU for RISC-V contributors, including:

RISE
- Daniel Henrique Barboza (Ventana)
- Max Chou (Si-Five)
External
- Alistair Francis (QEMU for RISC-V maintainer)

Dependencies

No dependencies.

Measure of Success

RISE Requirements

None (not accounting any of existing engineering investment against RISE resources).

Status

Development	INPROGRESS
Development Timeline	2024
Dependencies
Upstreaming	INPROGRESS
Upstream Version
Contacts	Daniel Barboza Max Chou

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