Bidding Starts: Wednesday, November 15th, 2023

Bidding Ends: Friday, December 1st, 2023

Contract Start Date:

Summary: 

Accelerate H.264 decoding by contributing RISC-V optimizations to FFmpeg. Specifically,

1. Implement specialized RISC-V DSP routines for the identified functions in H.264 DSP Functions

   1. Using hardware feature detection so specialized functions are enabled at runtime

   2. Only ratified extensions to RISC-V can be used, for example V + Zb{a,b,c,s}

   3. Implementations should work on vector lengths 128b and greater

2. Develop a test harness to verify correctness against the pure C implementation

   1. Randomized input verified against C for each specialized DSP function

   2. Update testing infrastructure to run full correctness test harness (2a) in CI

3. Develop a test harness to measure performance against the pure C implementation

   1. Unit tests to benchmark specialized DSP functions, see https://code.videolan.org/videolan/dav1d/-/merge_requests/1463

   2. Integration tests that measure H.264 decoding speed for set of real-world videos

4. Produce a performance report based on (3) that compares the pure C to optimized code

   1. DSP function speed-up on RISC-V hardware v C implementation

   2. Table of video sequence decode speeds (in FPS) before and after optimization

   3. Roughly equivalent data on alternate ISAs (for reference only)

5. Testing shall be done on any conformant RISC-V hardware that contains RVV 1.0 extension, for example:

   1. Kendryte K230 - https://www.canaan.io/product/k230

6. Software shall open source (MIT/BSD licensed, or similar) so it is available to other projects

Bidding Closed