About

RISC-V's conditional branch instructions have limited range for their target.  When the target is out of range the compiler has to create a inverted conditional branch around an unconditional jump.

RIght now GCC's length computations ignore compressable instructions and as a result the computed distance between the conditional branch and its target is significantly inaccurate.  If we can conservatively determine if an instruction will be implemented as a compressed instruction, then we can account for that in the length computation.  That in turn will allow the compiler to statically determine that more conditional branches can directly reach their target and thus avoid the inverted branch around an unconditional jump sequence.  That should improve performance, but it's unclear by how much.

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Status

Updates

Feb 3, 2025

• Folded into a different 1H2025 project 

Jul 9, 2024 

• New work item for 2H2024